Vector Optimization – Vector-Length Register

Maximum Vector Length

A vector register processor has a natural vector length determined by the number of elements in each vector register. The maximum vector length (MVL) determines the number of data elements in a vector of an architecture.

The MVL is unlikely to match the real vector length in a program. The length of a particular vector operation is often unknown at compile time or a single piece of code may require different vector lengths.

Vector Length Register

The vector-length register (VLR) controls the length of any vector operation, including a vector load or store. VLR can be changed to accommodate for any vector length. The value in the VLR, however, cannot be greater than MVL.

Strip Mining

When the vector is longer than the maximum length, a technique called strip mining is used. Strip mining is the generation of code such that each vector operation is done for a size less than or equal to the MVL. We create one loop that handles any number of iterations that is a multiple of the MVL and another loop that handles any remaining iterations and must be less than the MVL.

In the figure below MVL =4. The VLR value is 2 for the first iteration and 4= MVL otherwise.

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