A Cache Miss can be classified into one of three categories.

Compulsory Misses

Data that has never been accessed resides only in the Main Memory. When processor receives request for this data, it will cause a Cache Miss, as the data was never loaded into the Cache. These kind of unavoidable misses are called Compulsory Misses. They are also known as Cold-Start Misses.

Compulsory Misses can be reduced by increasing the block size. Increasing the block size allows more data to be fetched into the Cache. This improves the chances of a new memory location request already being present in the Cache. However, loading a bigger block will take more time. Thus, this process can have a negative effect on performance by increasing miss penalty. Prefetching can also reduce Compulsory Misses.

Capacity Misses

Capacity misses occur when the Cache cannot contain all the blocks that are required during program execution. During execution, the blocks need to be evicted from the Cache to make room for other blocks. The block is later fetched back into the Cache when it is needed again. Thus, it is the limit on the number of blocks a Cache can hold that causes these kind of misses.

Capacity Misses can be reduced by increasing the size of the Cache. This gives room for more number of blocks. However, this process increases the access time which has a negative effect on overall performance.

Conflict Misses

Conflict Misses are a variant of Capacity misses where multiple blocks compete for the same set. Thus, they occur only in direct-mapped or set-associative Caches. Fully associative caches have no Conflict Misses. They are also known as Collision Misses.

Increasing the associativity will reduce Conflict Misses. However, this process increases the access time which has a negative effect on overall performance.